Table of Contents
REGULAR PAPERS
| Towards Design Space Exploration for Biological Systems | |
| Simon Polstra, Tessa E. Pronk, Andy D. Pimentel, Timo M. Breit | 1-9 |
| YAVISTA: A Graphical Tool for Comparing 802.11 Simulators | |
| Ryad Ben-El-Kezadri, Farouk Kamoun | 10-20 |
| Process Variation Aware Transistor Sizing for Load Balance of Multiple Paths in Dynamic CMOS for Timing Optimization | |
| Kumar Yelamarthi, Chien-In Henry Chen | 21-28 |
| Hardware/Software Co-design Approach for an ADALINE Based Adaptive Control System | |
| Shouling He, Xuping Xu | 29-36 |
| Modeling of Leakage Current Mechanisms in Nanoscale DG MOSFET and its Application to Low Power SRAM Design | |
| Deblina Sarkar, Deepanjan Datta, S. Dasgupta | 37-47 |
| Low-Power and High-Performance 1-Bit CMOS Full-Adder Cell | |
| Keivan Navi, Omid Kavehei, Mahnoush Rouholamini, Amir Sahafi, Shima Mehrabi, Nooshin Dadkhahi | 48-54 |
| Dynamic Module Library for System Level Modeling and Simulation of Dynamically Reconfigurable Systems | |
| Kenji Asano, Junji Kitamichi, Kenichi Kuroda | 55-62 |
| Impact of Shift Operations on (-1+j)-Base Complex Binary Numbers | |
| Tariq Jamil | 63-71 |
| DDSC : A Density Differentiated Spatial Clustering Technique | |
| B. Borah, D.K. Bhattacharyya | 72-79 |
Journal of Computers (JCP, ISSN 1796-203X)
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